Computer Science and Engineering

CSE 225 Introduction to ASIC Systems Design

Verilog digital logic design with emphasis on ASIC and FPGA design. Students design and verify large-scale systems. Assignments and project use the Verilog Hardware Description Language with emphasis on verification and high-frequency ASIC/FPGA targets. Course may be taught in conjunction with CSE 125.

Requirements

Prerequisite(s): Enrollment is restricted to graduate students. It is assumed that students have introductory knowledge of computer architecture, processor pipelines, and structural verilog. Undergraduates may enroll with instructor permission and should enroll in CSE 125.

Credits

7

Instructor