Computer Science and Engineering

CSE125 Logic Design with Verilog

Verilog digital logic design with emphasis on ASIC and FPGA design. Students design and verify large-scale systems. Assignments and project use the Verilog Hardware Description Language with emphasis on verification and high-frequency ASIC/FPGA targets. (Formerly Computer Engineering 125.)

Requirements

Prerequisite(s): CSE 100 and CSE 100L. Concurrent enrollment in CSE 125L is required.

Credits

5

Quarter offered

Spring

Instructor

Jose Renau Ardevol, Matthew Guthaus, Heiner Litz